Generally, a semiconductor memory device receives an external signal and generates an internal clock which is used in operations of various buffers included within the semiconductor memory device.
A prior semiconductor memory device, as shown in FIG. 1, includes a first delay unit 100 which receives an external clock CLK and delays it by a prescribed delay interval to generate a first internal clock ICLK1, a second delay unit 101 which receives the external clock CLK and delays it by a prescribed delay interval to generate a second internal clock ICLK2, a third delay unit 102 which receives the external clock CLK and delays it by a prescribed delay interval to generate a third internal clock ICLK3, and a fourth delay unit 103 which receives the external clock CLK and delays it by a prescribed delay interval to generate a fourth internal clock ICLK4.
The first internal clock ICLK1 generated via the first delay unit 100 is used for controlling the operation of an address buffer 104, the second internal clock ICLK2 generated via the second delay unit 101 is used for controlling the operation of a command buffer 105, the third internal clock ICLK3 generated via the third delay unit 102 is used for controlling the operation of a data input buffer 106, and the fourth internal clock ICLK4 generated via the fourth delay unit 103 is used for controlling the operation of a data output buffer 107.
If such semiconductor memory device enters into a power-down mode or a refresh mode, it disables the first to fourth internal clocks ICLK1-ICLK4 generated by the first to fourth delay units 100-103, in order to interrupt the operations of the address buffer 104, the command buffer 105, the data input buffer 106 and the buffer output buffer 107 and thus reduce current consumption.
On the other hand, the semiconductor memory device may be in a Non-Operation state while in an active mode, in which the Non-operation state means an internal circuit of the semiconductor memory device does not perform any operation. Since the internal circuit of the semiconductor memory device does not operate in the Non-Operation state, the address buffer 104, the command buffer 105, the data input buffer 106 and the data output buffer 107 do not need to operate. However, if it enters into the active mode, the first to fourth internal clocks ICLK1-ICLK4 are synchronized to the external clock CLK and always toggled, which results in unnecessary current consumptions.